Digital devices, such as microprocessors, may include sequential logic elements in combination with storage elements, which may be synchronized by a clock signal. Two types of storage elements are flip-flops and latches. A flip-flop may be responsive to input during a rising (or falling) edge of a clock cycle, while a latch may be responsive to input while a clock signal stays high (or low). Thus, a flip-flop may be an edge-triggered device while a latch may be a level-triggered device. Since flip-flops may be easier to synchronize, many digital device designs use flip-flops as the storage elements. However, in high performance applications, latches may be employed, as the use of latches may enable a digital device to take advantage of both halves of a clock cycle. A latch-based design may need to take into account the possibility of race conditions. A race condition may result when the output of a sequence of signals may depend on two or more signals racing each other to influence the output, resulting in unpredictable behavior. Avoiding race conditions in a latch-based design of a digital device may be necessary for proper performance of the digital device.